The present application relates generally to the fabrication of semiconductor devices, and more specifically to a trench metal-semiconductor alloy process with self-aligned contact vias.
State of the art integrated circuits include various metallic interconnections. The interconnections are typically provided by depositing a dielectric layer over a semiconductor substrate comprising the various components to be interconnected, and then etching via holes through the dielectric layer to form contacts with the contact regions of each component.
As device feature dimensions decrease, it becomes increasingly difficulty to achieve proper alignment of a large number of contact via holes. Thus, it would be advantageous to provide a robust metallization architecture and corresponding manufacturing process.